Today I have observed again a kind of unpredicatable behaviour in quartus II that I had already experienced in another project.
In each case, the situation was:
- A specific signal on a design does not work as expected.
- To debug, an output pin is added to monitor a signal around the problematic part of the circuit. No other changes are made.
- As a consequence of adding this pin, the original signal works ok.
- The debugging pin is removed and the design works perfectly.
It seems as if the compilation process is not 100% deterministic but relies on previous runs. The same kind of problem has (had) been experienced in quartus 4.2 and 5.1. Is there any option to force quartus II to start each compilation from scratch?
Of course, there is the possibility that I am missing some point. Any hint?
Thanks for your time