Incrmental Compilation in Quartus 5.1

Jun 07, 2006 3 Replies

Hello, my co-worker has a very large Altera Quartus 5.1 design that takes about 45 minutes to compile. The project has already had the pins physically assigned and he is still adding things to the project such as updated modules. I mentioned to him that trying Incremental Compilation (IC) might decrease compilation time. He asked if you could do IC after the I/O pin symbols have been physically assigned to pins? I'm not an expert on IC so I hope someone can help.



Thanks, joe



Yes. Look at Design Partitioning...

Mark McDougall, Engineer Virtual Logic Pty Ltd, 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266

Hi Joe,

You can certainly use Quartus II Incremental Compilation after assigning the pins in your design to physical locations on the device. Incremental compilation should help your co-worker preserve the unchanged parts of his design, including the pin locations, as he adds updated modules. He should also save compilation time during this process as well. For more information on Quartus II Incremental Compilation you can visit the following links:

Quartus II Incremental Compilation Website (Provides an overview of the feature and links to more information):

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Quartus II Handbook Volume 1, Chapter 1 (Provides a thorough description of the feature and how to use it):

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Hopefully this provides all the information your co-worker needs to use incremental compilation for his design, good luck!

Regards,

Shawn Malhotra Altera Corp.

snipped-for-privacy@hotmail.com wrote:

Hi,

Beware of the fact that the Quartus Incremental compilation seems to be not compliant with some IP and the Signal Tap feature.

Regards.

Shawn Malhotra a écrit :

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Répondez moi en privé en cliquant sur ce lien : http://www.cerbermail.com/?MtHmcRTm5M

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