Memory Controller Operation

I have a generic question on how memory controllers work.

A device places the address, data, and write cmd to the controller then issues a request (REQ). After the memory operation completes the device gets an ACK back from the memory controller. What's the typical way REQ and ACK work? Does REQ stay high until ACK comes back? and how long does ACK stay high?


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There simple answer is it depends on the memory controller. It's totally up to the logic in the memory controller how these signals will interact. REQ could simply be a write stobe to a fifo or register, or it could act in conjucntion with the ACK as a semaphore. You definitely need to provide more info if you want a more detailed answer.


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