I am designing my own Altera Cyclone V SoM board. It is not intended to be a dev board. It will be a function module that also includes Analog Devices' SHARC DSPs.
I am working on the JTAG connection strategy. It seems to me that separate JTAG connections make more sense than chaining since Quartus may be running separately from the ARM (HPS).
Unless someone tells me something different, my plan is to use a pair of 2mm 2x5 headers, one for the FPGA and the other for the HPS. These would be identical to the Altera pinouts, just smaller.
I expect that the board will be running uLinux, probably GCC.
Here are my questions:
- I know that many of the Altera Cyclone V dev boards use a USB Blaster 2 circuit. Does anyone sell a USB Blaster 2 download cable? I have lots of USB Blaster clones already.
- What should I do about the HPS TRST#. It is not supported on the USB Blaster?
- The HPS Trace connections might be useful but these are needed for their alternate I/O functions. I am assuming that the Mictor interface will not be that helpful.
I would appreciate any other comments or insight.
Al