Evnin'
Just received the download link for ispLever 7.0 and read the announcement...
Is it really true that 7.0 supports now mixed Verilog/VHDL projects? And also that Synplify is included with the Linux version as the website says so?
cheers rick
Evnin'
Just received the download link for ispLever 7.0 and read the announcement...
Is it really true that 7.0 supports now mixed Verilog/VHDL projects? And also that Synplify is included with the Linux version as the website says so?
cheers rick
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