Is there any software I can use to transform state machines in VHDL into drawings?

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Hi,
I have designed many state machines in VHDL, and I hope to use any software to transform the state machines in VHDL into drawings.

Is there any software I can use to transform state machines in VHDL into drawings?

Thank you.

Weng


Re: Is there any software I can use to transform state machines in VHDL into drawings?
On Wednesday, September 8, 2021 at 4:24:49 PM UTC-4, Tianxiang Weng wrote:
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Questasim has a FSM debugger option that generates a graphical view of your state machine, but it's not always a great view for documentation purposes.

Re: Is there any software I can use to transform state machines in VHDL into drawings?
On Thursday, September 9, 2021 at 8:01:46 AM UTC-7, kkoorndyk wrote:
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:  
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ware to transform the state machines in VHDL into drawings.  
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o drawings?  
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ur state machine, but it's not always a great view for documentation purpos
es.

What I have been developing is a set of new hardware circuits that have bee
n never used. I want to apply for patents with full state machines design d
isclosed. For correctness, the state machines block diagrams should be cons
istent with the source code in VHDL. So I am seeking such tools. Now I have
 to draw block diagrams manually, it may introduce inconsistence.

Weng

Re: Is there any software I can use to transform state machines in VHDL into drawings?
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You could use https://github.com/hneemann/Digital to draw your state
machines, then export to VHDL.

Re: Is there any software I can use to transform state machines in VHDL into drawings?
On Friday, September 10, 2021 at 3:24:05 AM UTC-7, Thomas Koenig wrote:
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ote:  
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oftware to transform the state machines in VHDL into drawings.  
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into drawings?  
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 your state machine, but it's not always a great view for documentation pur
poses.  
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 been never used. I want to apply for patents with full state machines desi
gn disclosed. For correctness, the state machines block diagrams should be  
consistent with the source code in VHDL. So I am seeking such tools. Now I  
have to draw block diagrams manually, it may introduce inconsistency.
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Thomas Koenig,
I reviewed the website https://github.com/hneemann/Digital ; it is a wonderf
ul product, but I prefer my coding practice: using VHDL and drawing mutuall
y to complete a complex state machine. I use Intel Visio to draw state mach
ine block diagrams.  

When reviewing a state machine design, it is easier to use state machine bl
ock diagrams.  

Thank you.

Weng


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