hi , i do contract design and most of my fpga designs have one or more state machines written in VHDL , my question is how you document this for the customer as a deliverable ?
1) ok, well written and commented VHDL is self documenting .. sortof . but only to the company software types , managers do not get a warm and fuzzy and when there is maintenance at a later time it doesn't work well for managers/customers/new engineers to work with ..2) the old stand by is a flow chart, easy to use in a trouble shooting meeting with a wide variety of participants looking for the problem , bad part is they are expensive to make and maintain and my customers don't like me to quote time doing them , the pc programs that do them seem to take a lot of entry time and are expensive, i still often sketch out design flows in chart form on a big piece of paper on the wall before VHDL coding and keep it updated during the development but putting this into deliverable form is a pain ...
i was recently hired to solve a problem with a design I worked on a couple of years ago which their engineers were having trouble with , the deliverable documents had well written VHDL and text descriptions but at the time I quoted an additional manweek to provide computer generated system flowdiagrams and that was turned down ..
so when i returned i dug into the cellar and found my old original pencil drawn working chart , it was a 3' by 7' chart of the entire system including mini flowdiagrams of each state machine .. i slapped that on my customers conference room wall and 2 days later the problem was solved after an intense session with engineering/customer/managers all using it .. ok the customer is happy but perplexed how come i didn't supply such a diagram ... well , at the time they were unwilling to pay me a week to "professionalize" it ... and i even tried to get their document department to save a copy of the big chart and the snooty document department said that they would not save the "hand written mess" ... mmmm
i would like to be enlightened , thanks