Hi, Can you help explain a method to print a state flow graph for any state machine design written in VHDL using either Xilinx ISE or ModelSim software?
If neither has the ability of doing the function, what else software can do it?
Thank you.
Weng
Altera Quartus has such a viewer.
-- Mike Treseler
Well, I did a state machine in ISE some time ago, and as far as I can remeber, it was a matter of chosing "print" from some meny. I dont recall having any trouble with that at all.
Another thing is that I write my own state machines from now on. In VHDL. Thats not difficult at all. And the code generated from ISE is not *that* good, when it comes to human readability.
Hi Jan, What I want is not let Xilinx ISE to generate a state machine code for me, but I want ISE to print a flow graph of a state machine written in VHDL.
Thank you.
Weng
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