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IOBs in virtex4?

Hello,

I have a problem related with opb_ddr core for Virtex4. I'm trying to add support for DDR to my design and when using the opb_ddr I get the following warning which I think is related to the fact that the opb bus hangs when reading from ddr:

WARNING:DesignRules - Blockcheck: The placed component DDR_DQS_net_O has the REV pin connected to the signal opb_ddr_0/opb_ddr_0/DDR_CTRL_I/dqs_setrst while the adjacent site has the placed component opb_ddr_0/opb_ddr_0/DDR_CTRL_I/ddr_read_dqs with the REV pin unconnected. This is a resource conflict since the unconnected pin cannot be tied off as part of bitstream generation. Both pins should either be connected to the same signal or they should both be left unconnected.

Anyone know now to fix this?

Regs,

--
Cristian
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This is a real limitation. The phrase "adjacent site" refers to the paired ILOGIC and OLOGIC sites which share a routing resource for the REV pins. It's not possible to have one REV pin connected to this resource and the other not connected, hence the error.

The fix would be to design with this limitation in mind. No other placement is possible since the ILOGIC and OLOGIC components are connected to the same pad.

On a related issue, the tools will currently also error out if GND is on one REV pin and the other is not connected. Beginning with version 7.1i SP1, MAP will strip the GND connection, avoiding the error.

Regards, Bret

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Bret Wade

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