Anyone done a JTAG controller in VHDL or Verilog?
I want to use an FPGA to program another JTAG device.
Cheers,
Irish
Implement a JTAG controller in an FPGA
Jul 13, 2005
2 Replies
As far as I remember, Lattice has a reference design on multiple boundary scan port linker, see
formatting link
I think this can be used to program other devices through one centralised device. Please correct me if I'm wrong.
Luc
"Luc" schrieb im Newsbeitrag news: snipped-for-privacy@4ax.com...
there are only JEDEC files for the those boundary scan linker designs, not much useful at all
and I think OP was not looking for this type of thing but TAP master
Antti
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