hi all, can anyone tell me where i can get a free vpw/pwm controller either in vhdl or verilog according to j1850 standards.
thanks , asha.
vpw/pwm controller
Apr 16, 2007
3 Replies
Sounds like we don't know what "j1850" is. Could you point us at a reference somewhere?
Generally, PWM or other pulse generators are so easy to write in HDLs that I build them afresh each time I need one, using a few standard arrangements that I've used in the past. Input register, counter, comparator, output register...
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J1850 is an automotive comms bus, a bit like CAN, but (usuallY) only with one wire and a simple physical layer (single pull-up transistor per node):
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I guess the OP wants to do access the engine diagnostics.
To my mind this is much more of a microcontroller task than an FPGA one - it's all very slow! I bet you could use a Picoblazeo to bitbash it if you put your mind to it though :-)
Cheers, Martin
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hi i think i am not clear in my question.i am actually trying to develop vpw controller but not vpwm signal. SAE j1850 is automotive protocol standard. i am looking for ip cores like j1850 BDLC VPW core by DRIVVEN INC which is a paid version . i need free sources similar to that.can anyone suggest me some refereces for this.
thanks, ASHA
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