How to pipeline Loop Logic?

Hi all,

It's intuitive to pipeline a feed-forward combinational logic. But how to pipeline the Loop without changing the timing?

For example, when I insert a reg to feed-forward logic, shall I delete a reg in feedback logic at the same time?

And if the datapath logic is a iteration one(Logic A -> Logic B ->

Logic A -> Logic B ...)? How to do pipeline?

Any suggestions will be appreciated!

Best regards, Davy

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If by loop logic you mean feedback ie LMS adaptive FIR filter etc. then the answer is: very carefully. If you don't want the hardware to get very expensive you need to apply some relaxation to your pipeline calculations. You can look at the following book for some ideas:

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