How to create a delay BUF?

snipped-for-privacy@gmail.com =E5=86=99=E9=81=93=EF=BC=9A

if the signal is wide enough u can use flip_flop it will delay the signal one clock

snipped-for-privacy@gmail.com schrieb:

Hi, The verilog # operater and the vhdl after statement are not synthesizable and (as you already observed) therefore ignored during synthesis.

As mentioned before by cationebox, Flipflops/registres are a proper way to delay signals by n clock periods (n = number of serialized ffs ).

Have a nice synthesis Eilert

Probably worth mentioning DCMs/PLLs as well here - these allow you to do fine phase shifting on a clock, which can then be used (assuming clock domain boundaries are crossed correctly) to clock flip-flops with different timings than your original clock.

Jeremy

SRL16s are also good for adding easily selectable delays to signals.

Thanks for all of you,the device what i programme is SPARTAN 2,and i can't use more clock for delay flip_flop,is there other way for this problem?

There are other ways - some nasty, some not too bad. What are you trying to do?

Jeremy

Ycan create small delays on signals by passing the signal through a LUT configured to act as a buffer. Here it is in VHDL

LUT_DELAY: LUT1 generic map( INIT => X"10")

port map( O => signal_in_delayed, I0 => signal_in);

can you give me a verilog code,thank u!

This is a very small delay, maybe about 1 ns on Spartan 2. One way I have used to make a much longer delay on a 95xx CPLD that had no continuous clock was to pass the signal out an output pin and back into a different input pin. I put a resistor (about 1.5 K Ohm, in that case, for about 20 nS of delay) between the two pins. This, of course, eats up two whole pins for one delay. I needed to make something happen a safe delay after an I/O strobe went away, and this did the trick. Of course, where a fast clock is available, there are much more reliable and predictable ways to do this.

Jon

Typically any combinatorial equation, like a conditional statement, will get placed within a LUT.