I'm trying to use the Xilinx ISOCM memory in a Virtex-II Pro. I can't seem to get it to actually write to the ISOCM BRAMs.
In .mhs file I have:
BEGIN ppc405 PARAMETER INSTANCE = ppc405_0 PARAMETER HW_VER = 2.00.c PARAMETER C_ISOCM_DCR_BASEADDR = 0b0100000000 PARAMETER C_DSOCM_DCR_BASEADDR = 0b1000000000 PARAMETER C_DCR_RESYNC = 2 BUS_INTERFACE ISOCM = iocm BUS_INTERFACE DSOCM = docm PORT BRAMISOCMCLK = sys_clk_s PORT BRAMDSOCMCLK = sys_clk_s PORT DCRCLK = sys_clk_s . . . END
BEGIN isocm_v10 PARAMETER INSTANCE = iocm PARAMETER HW_VER = 2.00.a PARAMETER C_ISCNTLVALUE = 0x83 // Note ppc_clk_s is 2 times sys_clk_s PORT ISOCM_Clk = sys_clk_s PORT sys_rst = sys_bus_reset END
BEGIN isbram_if_cntlr PARAMETER INSTANCE = iocm_cntlr PARAMETER HW_VER = 3.00.a PARAMETER C_BASEADDR = 0x01000000 PARAMETER C_HIGHADDR = 0x01003FFF BUS_INTERFACE ISOCM = iocm BUS_INTERFACE DCR_WRITE_PORT = isocm_porta BUS_INTERFACE INSTRN_READ_PORT = isocm_portb END
BEGIN bram_block PARAMETER INSTANCE = isocm_bram PARAMETER HW_VER = 1.00.a BUS_INTERFACE PORTA = isocm_porta BUS_INTERFACE PORTB = isocm_portb END
In .mss I have:
BEGIN DRIVER PARAMETER DRIVER_NAME = generic PARAMETER DRIVER_VER = 1.00.a PARAMETER HW_INSTANCE = iocm_cntlr END
Then in my C code, I do the following:
// Initialize ISINIT register to starting address. // This works when I read it back. mtdcr(0x100, 0x01000000);
I'm using 0x100 for the DCRN address above since I set the base address of the IOCM DCR to 0x100 in the MHS, and the offset of the ISINIT from that base is 0.
// Write a value to ISFILL register. mtdcr(0x101, 0xFFFFFFFF);
The write to the ISFILL works and increments ISINIT as it should. Reading back the value in ISFILL gives 0xFFFFFFFF as it should, but this is just the register, not what is in BRAM itself. However, when I go to read the IOCM memory itself using:
long *p = (long *) 0x01000000; long x = *p;
I still get 0.
So it seems the like everything is working except the value in ISFILL is not being transferred to the actual BRAM. What am I missing? Do I need to create a DCR bus to the IOCM? Do I need to somehow enable DCR writes?
Any help would be appreciated.