How can I perform Boundary Scan Testing on Altera Cyclone II FPGAs using JTAG?

May 25, 2007 2 Replies

I think I have a problem with my Cyclone II FPGA and wanted to do a boundary scan check on the device to see if it is working ok. I looked for options to perform a boundary scan check using the Quartus programmer tool and couldn't find anything useful. I have used this feature on the Xilinx ISE tools and wanted to know if this can be done on the Altera FPGAs.



Any suggestions will help. Thanks Anup



just write your own STAPL file for the boundary test and execute it with quartus programmer

Antti

You may try these programs for manual boundary-scan test:

Scanseer --

formatting link
UniversalScan --
formatting link

They both allows to monitor and control device's pins in real-time using JTAG.

-- SK

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