I know about the bscan blocks in the xilinx virtex devices (bscan_virtex4 for instance). With these blocks you can make your own interface by use of the boundary scan usercode instruction.
Does something like this exists for altera devices?
TIA, Frank
Yes, but not very well documented. Contact me directly.
Best regards,
Ben
actually it is documented :) or was until my webserver got hacked and I had to format the HD.
altera docs contain enough info to use the altera scan primitive and lately there was some new app notes about this useage but I dont have those references handy - I think it was posted on c.a.f.
as a sidenote - all FPGAs have it today, Xilinx Altera Lattice Actel
the primitive is a bit different depending on family and device but it is available for use in user logic
Antti
Hello Frank,
Quartus II 6.0 has the new Virtual JTAG megafunction, sld_virtual_jtag, with which you can gain access to the device JTAG interface and develop your own IP to use the JTAG interface as a simple serial communication channel. A set of TCL commands in the jtag package available in the quartus_stp.exe TCL shell provide you a way to communicate with the device using any of the Altera programming hardware, such as USBBlaster, or to figure out the low level JTAG scan sequence if you need to control the JTAG using your own hardware. Please read the user guide at
H> I know about the bscan blocks in the xilinx virtex devices (bscan_virtex4 for
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