Having trouble building an old Xilinx Spartan3 FPGA project I did on ISE 8.2i and EDK8.2 for microblaze. Also have ISE9.2i installed.

Something is different. Maybe the project file cleanup did it. I would look on the synthesis report and see if those ROMs, RAMs, and FIFOs are still in block ram.

-- Mike Treseler

Checked these enviroment variables? set path = .. (executable path) setenv LD_LIBRARY_PATH .. (library path) setenv XILINX .. ("home" path)

I don't see the environment variables you mentioned except for the XILINX one and it's set to 8.2. To answer a few questions.

• No, I have not opened the project in 9.2.
• Yes, I have an archived version of the entire project including the ISE file. My ultimate goal is to make a slight change to the project w/out having to upgrade the project to 9.2 or 10.1. If EDK/ microblaze wasn't involved, I would just upgrade to the newest ISE release.
• Yes, the service packs are updated to what they were including the IP library.
• My top level is in ISE.

Thanks, Dale

Have you opened this project in 9.2? Do you have an archived version of the .ise file? Is the service pack level the same (including IP) as it was when you did this project originally?

/Mikhail

Rename your 9.2 directory temporarily and you will know if it affects anything...

Since EDK is involved, where is your top level? In ISE or EDK?

/Mikhail

Check reports (.syr, .mrp) against archived ones ... if e.g. register counts have increased, consider that synthesis options (e.g. "equivalent-register-removal = yes" may have been changed in the re-install...

- Brian