FPGA I/O pin current sink

Could u please suggest me the Xilinx FPGA device I/O pin with around 150mA current sink/source capability.

what is the name of this specification in the FPGA documents.

Reply to
Sai Sanda
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current sink/source capability.

I'm pretty sure you won't find a pin on any FPGA that drives that kind of current unless you're talking short-circuit (transient) drive. Either use multiple pins (and watch your timing skew) or use an external driver.

Reply to
Gabor

Better use external transistor / Fet as multiple pin can get all burned due to the fact that they do not open and close at the same exact moment and the first to open theoretically will need to drive for some period the total current and this get repeated over and over until ...

Of course if the current ramp slow enough multiple IO can be solution though myself I would stick with one IO and transistor / Fet.

Have fun

Reply to
Berty

Reply to
Symon

Besides "How" there is always the question "why".

150 mA is a lot of current, and the voltage must stay below 3.3 V. What are you really doing that you think you need this much current? Peter Alfke, Xilinx Applictions
Reply to
Peter Alfke

Or when transitioning, go to Z for a clock between driving high and low in a "break before make" sort of way.

Jeff

Reply to
Jeff Cunningham

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