LVCMOSS33 I/O sink current

and fast slew rate. I am assuming that 16 mA is the source current at 3.3V as my VCCO voltage is 3.3V. I would like to know what is the sink current capability for LVCMOS33 OUTPUT pin is. Or is there any way I can increase the sink current capability?

Plane. With this I am seeing low swing of 400mV. If the sink current was truely

output go down to 0v.

and fast slew rate. I am assuming that 16 mA is the source current at 3.3V as my VCCO voltage is 3.3V. I would like to know what is the sink current capability for LVCMOS33 OUTPUT pin is. Or is there any way I can increase the sink current capability?

Plane.

With this I am seeing low swing of 400mV.

If the sink current was truely 16 mA, then the low swing should have been 0v.

I raised the pullup value to 330 Ohms and the low swing was 200mV.

output go down to 0v.

CMOS drive, Sink current is not a pure current source, it is spec'd at some Vol level, and for a given PinDrive selection it will sink MORE than that level. Real CMOS drivers are MOSFETS that look resistors, in the sub-volt saturation region. In your example, the 400mV is the expected drop across that resistor, and that is why it drops to 200mV when you halve the load current, by 150 => 330 Ohms. What is this driving ? - 400mV maybe fine as a Vol, or you could go to a higher Drive option and lower that 400mV.

-jg

As per my understanding, you are suggesting an external transistor in parallel with the n-channel transistor to ground. The external transistor will turn on when the FPGA is driving low and will provide low resistance path to ground.

Also you are suggesitng to raise the sink current value to 24 mA. Currently I am using 16 mA driver. I am assuming that 24 mA sink current will some how lower the resistance of the n-channel mosfet in the FPGA when it is on and help reduce the voltage drop across it. It will be great if you can expand on this. I am assuming that this solution will not require any external transistor to ground.

Thanks for your feedback.

with the n-channel transistor to ground. The external transistor will turn on when the FPGA is driving low and will provide low resistance path to ground. No, no, no. I am not suggesting an external transistor. I just wanted to give you an understanding of the CMOS output structure. A very basic understanding. Peter Alfke

am using 16 mA driver. I am assuming that 24 mA sink current will some how lower the resistance of the n-channel mosfet in the FPGA when it is on and help reduce the voltage drop across it. It will be great if you can expand on this. I am assuming that this solution will not require any external transistor to ground.

Test01,

The voltage can not be made to go to 0 volts.

That would be a 0 ohm impedance for the driver.

There is no such thing as a FET with 0 ohms ON resistance.

So, realizing this, what voltage do you actually need when driving low?

Austin

am using 16 mA driver.

n-channel mosfet in the FPGA

Correct. 24mA has lower resistance MOSFET than 16mA

ground.

No external transistor is needed, it will decrease the 400mV loss to 2/3 of that. If that is still too much, you could parallel pins on the FPGA.

-jg