hi,
is there some known bug around using generics in FPGA Compiler II ?
I tried this simple code (package, component and its instance see bellow), FPGA Compiler II v3.7 gives this error message:
What does this mean ?
thanks, Marek
Proposed code:
--------------------------------- LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.numeric_std.all;
PACKAGE pkg_pokus IS
-- ADDRESS WORD length constant ADDR_WORD_LENGTH : natural range 1 to 16 := 10;
-- type of the ADDRESS WORD subtype ADDR_WORD is std_logic_vector(ADDR_WORD_LENGTH-1 downto 0);
-- type of the ADDR_integer subtype WORD_A_i is natural range 0 to 2**ADDR_WORD_LENGTH;
-- Some constant constant PROG_REG_ADDR : WORD_A_i := to_integer(to_unsigned(16#3ff#,ADDR_WORD_LENGTH));
END pkg_pokus;
------------------------------------------------ LIBRARY ieee; USE ieee.std_logic_1164.all; USE ieee.numeric_std.all;
LIBRARY AnalogMaster; USE AnalogMaster.Pkg_pokus.all;
ENTITY ADDR_DEC IS GENERIC( reg_addr : WORD_A_i := 0 ); PORT( addr : IN ADDR_WORD; cs_n : OUT std_logic );
END ADDR_DEC ;
ARCHITECTURE addr_dec OF ADDR_DEC IS BEGIN
process(ADDR) begin if ADDR = std_logic_vector(to_unsigned(REG_ADDR,ADDR_WORD_LENGTH)) then CS_N addr, cs_n => cs_n ); END struct;