It is very difficult to get a full feature to feature compatible device in both families. Both companies have different kind of resources, for Xilinx has 18Kbits size block RAMs, whereas Altera has
512bits and 4k bits block RAMs.
But the rough way to compare is to compare the LUTs, i.e. four input Logic elements. Both the vendors give their FPGA logic capability in terms of equivalent Logic Elements.
GX-60 has about 60K LEs, so you could think of using Virtex5, LX50T, which would have about 50K LEs,
Similarly for GX-90 (90K LEs) you can take a look at Virtex5 LX85T (~85K LEs)
But watch out for inflated "logic element" count in Xilinx where the actual number of LUTs is smaller. For V5, however you'll probably need to port your design to see how it fares because of the LUT6 vs LUT4 size factor. If you have a lot of paths with multiple levels of logic, the LUT6 can help with speed as well as logic element reduction.
I suggest also considering transceiver speed, jitter and signal integrity. Stratix II GX FPGAs provide a production qualified transceiver speed of 6.375 Gbps which isn't addressed by V5 LXT.
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