I get the impression that Altera is in the lead when it comes to speed on DDR[3] interfaces. Can anyone confirm/deny this?
Altera claims to be able to clock a 64/72bit wide DDR3 at 533Mhz on the StratixIII:
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For Xilinx, the fastest reference design I can find is 32bit wide DDR3 at
400Mhz for the Virtex5. Can Virtex4 do better?
So far, it looks to me like Altera did a KO on Xilinx when it comes to DDR3. Please tell me I'm wrong, Id hate to switch tools :p (and I need hard facts, not sales numbers)
PS even DDR2 designs at 200MHz is not trivial for V4/V5, I would be very careful before trying some Xilinx chip at memory clock above what Xilinx itself claims. It doesnt mean that is not doable of course. Already V4 slowest speed grade FPGA fabric can have signals as high as
1GHz (my own test measurements!) for very short distances, so 533 should not be impossible for V5 highest speed grade. But its not the fabric or I/O speed alone that is needed for the successful implementation.
Altera has dedicated logic for source synchronous clocking for memories, that might make the difference. But be aware that that dedicated logic also creates more restrictions to pin placement and can waste big amounts of pins if you use many IO-voltages. In Xilinx V4/V5 the pin placement is sometimes easier to do. IO-structure is always a compromise between speed and flexibility.
We chose different paths: Altera used hardened logic to get their speed, where we chose to stay general, and use any pins/any fabric/any standard.
We have DDR3 designs that are also working at 533 MHz.
Best to sit down and talk with your FAE on the subject.
There are many other factors to consider (not he least of which is we are in full production on Virtex 5 LX, LXT, SXT, and they are just now in ES on on few parts, with S3 GX canceled completely).
Even though Altera has some really mean, cool, and neat power point presentations, we basically have no competition whatsoever at 65nm at the high end (as you can't ship power point in your systems).
But is it worth something in a real application or is it just 'cool'? When reading Xilinx memory interface application notes I get the feeling the cool factor (to get numbers to put in nice powerpoint presentations) is often more important than practical use. 533 MHz is pushing the limits on a Xilinx device but with dedicated I/O logic (like fast local clock paths for DQS) it would be a breeze to design. The way Xilinx works they say it can be done, but every more complicated interface like PCI, DDRx, PCI Express, serial ata, etc, etc is suddenly extremely difficult and should be left to the professionals. It is like Ford saying their cars are great and better than the rest, but in the real world you'll find you need 3 arms to drive around.
A lot can be said about Altera, but almost every hobbiest FPGA user in the world is using Altera devices. This certainly says something about the ease of use of Altera parts and software.
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your "hit comparison" is example of bad(brilliant) use of google for statistics.
the 27000 to 990 is not true ration of xilinx:hobby vs altera:hobby
fact is there are no commercial retro-compurers ever built on Xilinx devices, all are Altera based, this has surprised my sometimes, as it really made me also think that hobby people (at least some) prefer Altera
of course on reason for hobby-altera is the fact that LARGEST non-BGA FPGA device is made by Altera. And that latest Xilinx low cost family is not all available in non-BGA packages (i dont count the tiny S3A-50 at all, as it just so tiny)
:) you say it. well, if you have found ONE commercially produced retro computing platform with Xilinx i would like the reference.
yes, of course, Trenz has retro-computing BASEBOARD (for xilinx modules) but this does not count. there is also the board from the xilinx guy, but that was never commercially produced.
besides those I do not know any.
ah, now i understand; yes there are may REAL hobby retro projects implemented for Xilinx FPGA
but I was talking about BOARDS designed for retro-computing as MAIN purpose. from those 3 are made with xilinx.
burched tried something, but it was genpurpose xilinx board + modules combined and named as retro computer, so it doesnt count as well.
but still, if any one is aware of ONE SINGLE commercially produced device for retrocomputing made with Xilinx FPGA I am all ears..
It's not a "market" it's a marketing/advertising opportunity. If I were A or X I think I'd hire a full-time product-evangelist engineering position and task them with getting products into the hands of new users and supporting the "hobbyist" people. Make a $10 battery powered demo board with some blinkenlights and give them away to pretty much anyone who wants one. Send someone to the Maker Fair and similar venues with a few hundred giveaway boards and CDs with WebPack etc. Sounds like pretty cheap advertising to me.
Austin's two paragraphs above only make sense together if he believes that no hobbyist ever turns into (or even communicates with) a professional FPGA-using engineer. Otherwise half of the game is getting more mindshare than the competition and having people feel good about your brand and tools when someday someone says "hey, maybe we should use an FPGA for this application".
There's a lot of profit in having your brand be the first one that people encounter.
And here you guys are making a serious mistake. People tend to continue use the devices they learned work with at home or at school. I see this regulary with interns. If they learned to work with FPGA's from Altera, they will look at Altera first if they need something. So if Altera fits the bill, Altera wins a design-in into a product.
I see this happen every time with interns. Ofcourse Altera can be replaced by any manufacturer's name.
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You are so right. It's sometimes even surprising how much we all "try to play with known toys", I am trying to get rid of my electronics junkyard, so I asked on german forums if someone wants to look and grab things of interest. So one student did come, and all he looked for was PIC stuff, he say he know that, and thats it. No Atmel chip, no FPGA thing, nothing just the things he had used before.
I used PIC when PIC15C54 was "hot", as they had almost no competition. I changed to AVR as they are better.
But Microchip is still VERY succesful selling his PICs that are really bad architecture, mainly because of their marketing. Every **** student wants PIC, and they will use it in the everyday work later on too. No matter that there are no advantages of using PIC. Its just the routine, and "familiar", it will be used if it fits.
So the "educational" and hobby, etc.. is of importance. Also for FPGA vendors i would say. Without the "edu+hobby" popularity of the PIC's Microchip could not have success.
Complex parts like complex FPGA/CPLD need complex toolchain. You have to manage these tools for a long time, if you once decide to roll out some product with this chain. So changing FPGA needs changing the chain and careing for both, so you think double before changing...
Hence the Xilinx University Programme. Certainly, in the UK both Xilinx and Mentor FPGA tools are widely used across Universities. If this isn't promotion to potential professionals then I don't know what is. For the hobbyist, a low-end Digilent board and ISE WebPack never broke the bank.
As to implementing DDRx interfaces, having put a DDR2 interface on a V5LX50 device last year, I am not sure that the flexibility of the underlying structure is necessarily worthwhile the hassle for the end user. The general purpose flexibility of the logic is made irrelevant by the number of different pinouts of Xilinx devices in a series. The main gain is for the silicon vendor in being able to have fewer product variants and save real-estate on hard implementations of features that only a few customers want.
While Virtex 5 has indeed been shipping longer and is a very strong product, Stratix III FPGAs are shipping and doing well. Altera ships production qualified Stratix III FPGAs this week and has rolled out multiple devices.
Our customers have highlighted they like the sizable density advantages of the biggest FPGA, the 3SL340 device (>15% higher LE count, 35% more flip-flops, 60% more memory, 3X DSP resources). Other customers like the clear performance advantages (2x speed grade edge). Others like the compile time advantage (1/3 the compile time to get far higher utilization). Still others like the power benefits (30% lower power validated on silicon). And others like the working 533 MHz DDR3 solution that also supports DIMMs.
Stratix II GX continues to be the optimal solution for customers requiring transceiver performance >3.75 Gbps, though Virtex 5 LXT is indeed a very strong product for slower speed designs.
Please contact your Altera rep for further details on any of the products above. We also have some very nice PowerPoint presentations.
V5 is nice product for lower speed designs ;) eh, but seriously there are companies who make BIG promises and decrease the real numbers, so has MGT performance gradually decreased while technology advanced V2ProX -> V4 -> V5, Lattice as example hasnt ever promised MGT speeds higher then they are able to deliver, they say that they can do up to 3.6G, hmmm...
quote "SIIGX continues"... it does actually confirm the statement from Xilinx that SIII-GX is cancelled. So maybe Altera has also problems above
3.6G with SIII-GX, so it isnt even offered, forcing the MGT user to use one family older silicon ?
Ok, whatever Altera has at the moment (compared to Xilinx) a) better package options for low cost families b) better offers and package options for CPLD (MAX2/Z)
This is something Xilinx CAN NOT DENY. Maybe the think flexible small form factor package options are not important for consumer market. Maybe.
And maybe Xilinx is trying to get out from CPLD business. Maybe.
If not then its pretty much time to offer low cost small factor FPGAs and something new for CPLD-like desings for Xilinx.
Or maybe increase MGT speed to >6G for Virtex-6 ? Eh even V5FXT isnt officially released. Maybe Xilinx is so busy doing the RAD-hardening for V5, its still hard task and they only got 23M$ contract todo this. Eh hope the rad-hardening of V5 doesnt add any other delay into the release of normal V5
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