We designed an own IP, which performs some specific ALU operations. We have added it to the FSL interface of the microblaze core. Everything worked properly, but now I have extended the ALU with a root and cubic operation. When I now try to run the synthesis in EDK I get an fatal error with no further information
Error Message:
--------------------------------------- Generating synthesis project file ...
Running XST synthesis ... INFO:MDT - The following instances are synthesized with XST. The MPD option IMP_NETLIST=TRUE indicates that a NGC file is to be produced using XST synthesis. IMP_NETLIST=FALSE (default) instances are not synthesized. A batch file, synthesis.sh, has been created that allows you to synthesize those instances in your specified synthesis tool of choice. fsl_ff3_0_wrapper (fsl_ff3_0) - C:\FF3_Arithmetic\FF3_ALU\system.mhs:133 - Running XST synthesis FATAL_ERROR:MDT:Portability/export/Port_Main.h:127:1.53 - This application has discovered an exceptional condition from which it cannot recover. Process will terminate. To resolve this error, please consult the Answers Database and other online resources at
As I said everything was working properly until I added two new HDL files to my IP module. The compilation and simulation looks fine of these files so there shouldnt be anything wrong with them. I used Mentor Graphics Precision RTL Synthesis and there my whole module was synthesised without any error messages. I also added this two files to my .pao file. I use EDK 6.2.03i.
Anyone encountered a similar problem and has some advice what could be wrong? Unfortunately I cant find anything on the Xilinx Homepage for this kind or error
Best Regards Philipp