EDIF format

hi,

where can i find a description of the edif format.

doesn't have the syntax

regards, quad

hi,

where can i find a description of the edif format.

doesn't have the syntax

regards, quad

Try,

Petter

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A: Because it messes up the order in which people normally read text.
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A: Top-posting.
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I can't address the larger question, but if you just need to read and parse edif, BYU has two good solutions:

1. Robust but slower:
   formatting link

1. No longer supported but fast and great for custom uses:
   formatting link

I'm using 2 and am very happy with it. It's based on an edif description

that can be run through JTB and JavaCC. Incidentally, edif.jj gives you the edif syntax, although it doesn't provide any semantics.

I do not necessarily need to read and parse edif. I need to write edif, in other words, i need to construct edif using c code. Are there any books/ebooks on edif with documentation enough to construct netlists ourselves?

You can buy the CD-ROM from

Or the paper/PDF for version 2.00

Petter

--
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing on usenet and in e-mail?

If I recall correctly you had posted earlier this month about creating a C-to-EDIF program that would create (aka synthesize) designs to be used in a FPGA. If this is still your intent then I would suggest you simply take a look at some example EDIF files for the particular vendor and device that you are going to target and just emulate what is in them.

The EDIF format structure is very simple, but not all possible keywords and styles are supported by every vendor. Your best shot is to start with known working examples (with hierarchy) and just output the same for your design netlists. The format itself is a trivial task, outputting a correct design netlist will all of the right design entry primitives, ports and attributes is the hard part.

Good luck.

Ed McGettigan

-- Xilinx Inc.

See also an XST or Quartus technology schematic for a graphical view of the luts'n'flops netlist.

-- Mike Treseler

Yes, even if you have the EDIF spec you can't know that your Xilinx targeted netlist is more or less useless without a (property init (string "XX")) where XX is the lut value.

Petter

--
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing on usenet and in e-mail?