Hi,
After I builded my design in EDK and made a toplevel VHDL in ISE, I started writing code for both PPC on my V2P20 ... the first PPC serves as an Communication unit which transfers data in between memories, accessible by external device ... I have no problem whatsoever accessing these memories, either on opb or plb busses When I started the part of interconnecting the two PPC with a BRAM memory using DSOCM I encountered the following problem, which up to know I cannot solve (this is the first time I design on FPGA) ...
To access the BRAM from the first PPC serving as Comm Unit I used the code which worked for accessing memories on the PLB since I suppose the addressing of memories is always in the same way, as if we address one big memory
code : Xuint32 * bram_Ptr = XPAR_BRAM_BASE_ADDR; Xuint32 value = *bream_Ptr;
When I download the bit file on the FPGA, the system hangs, when executing these commands
can someone help me with this problem, I spend some time looking for the solution and I found some macros in xio.h, but I have no clue how to use them, and when I look into application notes, it appears nothing is ever said about how accessing BRAM, so it must be straightforward
thx in advance
could be I miss some parameters or connections in the MHS file, but I doubt it since all should almost be set by default
BEGIN dsocm_v10