Driving crystal with cheap FPGA ( MAchXO2) directly ?

I tireid using ust a pin pair and inverting function.
But with LVCMOS333 on Breakout Board ( 3,3V for I/O), MachXO implements hysteresis on input and this seems to hamper the oscillations.
I can't start the crystal reliably. If oscillation starts, it runs fine.
I used siimple 24MHz quartz with 1M across and 22pF toward GND on each side.
Can't find anythong on the matter on Lattice...
Reply to
Brane 2
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Any reason you're using a crystal rather than a crystal oscillator? The latter has the resonant amplifier built in, rather than depending on the vagaries of the FPGA I/O pads.
(A reason could be to save $0.01 in a product, but I doubt that's the case here)
Theo
Reply to
Theo
Just testing something. I already have osc on PLL, but needed extra frequency that I couldn't synthesize.
I had a crystal for it, but not an oscillator, so I thought about just popping a crystal on FPGA for the test...
Reply to
Brane 2
To be able to route as a clock internally, you probably have to wire it to a clock input. I suspect such inputs deliberately have hysteresis to reduce the jitter of input clocks, which would counteract your wish to have a resonant circuit.
You could use some discrete components to make a separate oscillator?
Theo
Reply to
Theo
I did. 74HC04 plus two small caps and two resistors have done the job for the moment.
I suppose I could do it on FPGA directly, but it would take some time f**ing around with resitive networks etc.
Reply to
Brane 2
quency that I couldn't synthesize.
popping a crystal on FPGA for the test...
o a
e
You make two assumptions without checking a data sheet. How likely is your conclusion to be correct?
As it turns out neither of the assumptions are correct. The eight clock in puts on the MachXO2 devices can be single ended or differential. When sing le ended the Schmitt trigger feature can be turned on or off. The input ci rcuit can be used differentially with an RC used to set the operating point of one input vs. the other. Resistor between the two inputs, a cap on one input and the crystal connection to the other input. This should give opt imum sensitivity, almost like an analog device. When the input signal is l ooped back to the output it will be digital, but with an appropriate attenu ation network to protect the crystal from damage, it should work fine. The attenuation network is often used with more analog-like devices such as th e 74HC04.
Also, clocks can be sourced from the general routing, so any input can be u sed for a clock. It may not go through specific clock features and will ha ve more delay, but it will work just fine as an internal clock.
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Reply to
Rick C
Which means using 3 pins for a simple crystal, which often are not there.
It's easy to overelook such details in bazillion pages of data sheet.
I tried to do it traditional way with simple input and output.
With 74HC it works just fine. But will have to redo it for an exercise in other versions ( with hysteresis and with diff-input + output.
Also, I've noticed that I can make it oscillate with just one inverter ( probably depending on the routing). It seems this could be done with just one I/O pin, at least in some cases...
Reply to
Brane 2
other versions ( with hysteresis and with diff-input + output.
probably depending on the routing). It seems this could be done with just o ne I/O pin, at least in some cases...
A 74HC04 is an amplifier if you are in the middle of the input voltage rang e. You can do the same thing in an FPGA, but you need to add a high value resistor in parallel with the crystal and make sure there is an inversion b etween input and output. The resistor will make the circuit unstable and t he crystal will control the frequency.
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Just make sure to get the I/O configuration right. No Schmitt triggers!
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Reply to
Rick C
This sounds like a threshold issue. Are you certain the 1M resistor is sufficient to always drive the input such that the output should switch polarity?
When it doesn't oscillate, is the output always high or low?
What I have seen in similar circumstances, is that the circuit oscillates at a frequency governed by the R and C in a relaxation mode, and not the crystal at its resonance.
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Mike Perkins
I believe the resistor is there to establish a DC bias at the threshold of the input. The crystal acts primarily as an LC series resonance, so very low impedance.
A relaxation oscillator requires a change to the threshold for the two states. You will get that if there is hysteresis. Otherwise not.
I believe the initial problem was the inclusion of hysteresis in the input pin configuration.
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Reply to
Rick C
The OP mentioned hysteresis on the MaxXO inputs.
Which, if the 1M resistor is sufficient to establish a DC bias, would have oscillated in one way or another.
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Reply to
Mike Perkins
tirsdag den 16. juni 2020 kl. 13.57.58 UTC+2 skrev Brane 2:
for a crystal oscillator a 74HCU04 is normally used
Reply to
lasselangwadtchristensen
One comment on this, the basic circuit for a crystal oscilator doesn't need an 'Inverter' from pin to pin, but an inverting amplifier. At the crystal resonate frequency, it provides 180 degrees of phase shift, giving positive gain at that frequency, and oscilation.
A typical inverter chip will bias itself into its quasi-linear region and normally oscillate.
A generic pair of pins is unlikely to end up biasing itself this way reliably. You are more apt to end up with a relaxation oscillator whose frequency is based on the capacative load and propagation times.
Reply to
Richard Damon
True, but I didn't have it at handy, so ordinary HC04 had to do...
Reply to
Brane 2
I would ask what difference you see between an inverter chip and an inverting function in a more complex device that is relevant in this situation?
The point where the bias is important is the input pin. Can you explain what DC level you might expect to see at this input pin that would not be very close to the input threshold voltage?
One of these days I should connect an input and output through a resistor to see just what it does with different delays in the path. Then add a few different crystals to see what happens.
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Reply to
Rick C
One important factor is probably propagation time.
tz in a suboptimal operating region.
Reply to
Brane 2
artz in a suboptimal operating region.
So a slow inverter (like CMOS) would have the same problem, no? How much d elay is acceptable? I don't know any inverters that don't have measurable delay.
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Reply to
Rick C
HC,AC have delay that strongly corrsponds to capacitive load.
Fro HC it would be probably about 10 ns worst case and perhaps 3-4 ns when lightly loaded.
But since here it is oerating practically in linear region, I'd say that with decent VCC (5V) it is closer to 1ns and on 3,3V perhaps 2-3ns...
Reply to
Brane 2
Also, separate HC doesn't have the problem with current budgets and ground bounce, like FPGA, so that might also be a factor...
Reply to
Brane 2
n lightly loaded.
with decent VCC (5V) it is closer to 1ns and on 3,3V perhaps 2-3ns...
Why would running linear give a 1 ns delay? Even a couple of ns sounds sig nificant when running a 24 MHz crystal. I can get single digit ns delays f rom pin to pin in an FPGA.
VCC Typ Max Max Max 4.5V ? 9 18 23 27
That's a far cry from 1 ns.
I'm just not buying the idea that a 74HC04 will be a fine oscillator when a 12 pF load capacitor is used and an FPGA loopback will not.
I once designed a circuit where from input to output I had 15 ns. It's sti ll working fine and that was an FPGA available in 2000.
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Reply to
Rick C

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