DVI-D Tx directly from FPGA?

Question

If you ever spot ( or need help writing/testing )a FPGA DVI transmitter, let us know! I've been thinking about trying that for a small S3Ehome project; lots of colo{u}rful pixels with only afew differential output pins and no PHY. Seems like a simple bias network could shift the(DC-balanced) encoding scheme from LVDS to TMDSlevels ( or just use an S3A with TMDS drivers ) Max resolution would be limited by the FPGA I/O ratesto say a 60-80 Mhz pixel clock; I think that gets youinto (or near) 1024x768 territory.IIRC, you can map the DVI-D signals directly onto aneven smaller HDMI connector for a really tiny board( PS/2, HDMI, VQ100 FPGA )have fun,Brian

MikeJ · Accepted Answer

I looked into this, then realised you can buy a small chip which not only had a decent DAC to give you RGB analogue outputs, it also drives DVI.There is one on the cheaper V5 eval board from Xilinx. As I need a DAC anyhow it seems the way forward .../Mike

Eric Smith · Answer

Can you get TMDS drivers that aren't part of a DVI transmitter chip (which also does the encoding)?

It doesn't appear that DVI transmitter chips cost much, so is it really worthwhile to try to avoid using one?

Brian Davis · Answer

The only thing I've spotted are the HDMI mux chips, which do TMDS -> TMDS ( e.g. AD8190 )

and MikeJ wrote:

I think that makes great sense for a larger board, especially if you also want the analog outputs.

However, once someone writes a DVI Tx encoder and works out a driver scheme for the S3E (or uses TMDS on S3A), DVI is only a connector away...

Beyond than the really important home projects, like hi-def Asteroids, I also have some homebrew RF test equipment in mind.

In that case, if I'm doing several functions in one small FPGA, I'd much rather have only 4 LVDS pairs switching at my reference frequency, as contrasted to 12-24 CMOS lines, driving another chip, switching at its' own variable reference clock.

I hopefully will have an S3E board set up for other purposes in the next month or few, I'll try to look at some LVDS -> TMDS biasing schemes when I do.

Brian

MikeJ · Answer

Yeah, it can't be that hard. If you figure out the analogue stuff the DCI encoding is fairly easy I think. Wonder if you can get away with patching a socket onto the S3E board, I have one on my desk :)

no, don't distract me, I'm in the process of releasing Frogger and Scramble - had enough of real work for this morning !!

/Mike

Erik Widding · Answer

Yes, but it would not be HDMI or DVI compliant. We do this from the LVDS outputs on a Virtex4 to a MAX3814 cable equalizer. Simple capacitive coupling works, because there is a current source (pull up) in the CML inputs on this chip.

As above. Be careful, there are a number of things that won't work. Most CML stuff we looked at has a pullup in the ouput driver (which is not compliant with HDMI), instead of the input, which would also require pullup resistors to bias. Many of the TMDS muxes, are simple analog muxes, and not CML drivers. Cable equalizers are the only things that we found a year ago that seemed reasonable choices. Market may have changed.

8 IO pins total required on the FPGA. Ability to embed audio or other data for HDMI. Complete control over the protocol.

To go from an 8 bit data stream to a differential pair with TMDS encoding running at the max toggle rate of the FPGA pins is not a terribly difficult design to do. Three of these in parallel (with a very slight difference, depending on which channel it is) makes a complete interface.

Regards, Erik.

ZR1TECH · Answer

Whats the device that has DAC and DVI outputs? does it also have acolor space converter? Ycrcb to RGB??The only one I saw was a chrontel 7303 and they never answer my callsor emails...thanks-Bill

MikeJ · Answer

ch7301cI am rather worried about sourcing it though.

DVI-D Tx directly from FPGA?

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