Crystal input for FPGA

I am posting this just as a suggestion for future FPGAs. It would be nice if a crystal can be connected to FPGA to provide clock instead of a oscillator. The cost difference between an oscillator and a crystal is significant. A 50MHz oscillator (2.5v) fro S3E costs $3.27. A 100MHz one is around $6. But all the crystals are less than $1. I have worked with PIC microcontrollers in past and they have the option of connecting both.

I may be missing something here or may be this is already solved in some other way. I searched through Xilinx website but could not find anything. Please let me know if there is an existing solutiuon.

Thanks Sumit

Reply to
shrutisumit
Loading thread data ...

If you're counting pennies like that, consider rolling your own crystal oscillator using one of the tiny logic inverters (M74VHC1GU04 or equivalent). The inverter will cost pennies, the crystal will still be a buck, you'll still need the handful of parts you'd need with the PIC, and you'll still need the months of engineering time and hassle with purchasing and manufacturing to get and keep things at a rock-solid reliable level under all conditions and manufacturing variations.

--
Tim Wescott
Wescott Design Services
 Click to see the full signature
Reply to
Tim Wescott

XTAL osc were there, but removed many generations ago.

These days, you can get cheap SOT23 Osc from Linear/maxim, that can clock FPGAs in many applications.

-jg

Reply to
Jim Granville

Been there, done that. XC3000 had (has) two pins that wrap around a single-stage buffer, and are meant to be connected to a xtal. Add a biaing resistor plus the obligatory caps to form a Colpitts oscillator. It was a support nightmare. Even if 99% of applications had no problem, the remaining 1% drove us crazy. Too little gain, too much gain, too low a frequency (32 kHz), too high a frequency (>100 MHz), doesn't start at cold, bad pc-board layout, etc Canned oscillators are made by experts, using exactly the best chip for the particular frequency, and use the smallest amount of power. And they are surprisingly cheap, far less than the $6 quoted in the posting here. You can even get a 312.5 MHz oscillator for a few dollars...(Sits in every cellphone) Never again will we put that driver into an FPGA ! Peter Alfke, Xilinx PS: when I was at AMD, we second-sourced the 8051. Most of Intel's mask revisions were caused by their oscillator circuit... ===================================

Reply to
Peter Alfke

Good idea, but the FPGA will NOT like the sine drive - there are 1G variants, that ARE designed for Crystal Osc, [1GU04+1G14 in one package] Philips have a couple, TI have one, eg 74AUP1Z04

-jg

Reply to
Jim Granville

All,

Nothing like failure to cause one to abandon a feature forever.

A crystal oscillator that: always starts, is always the right frequency, and is cheap -- is best left to those who have solved it for a few dozen useful frequencies (and even they have their share of headaches).

It would be (and is) a horrible business risk to attempt to supply a circuit that would always work for every possible crystal from near DC to daylight.

Can anyone guess how many different parameters there are to specify for a crystal? It is not just the frequency....

Austin

Reply to
Austin Lesea

The companies that do this properly, typically have 4 gm's or transfer gains selectable by fuses, that cover 1-2 decades of frequency/option.

Most vanilla Osc circuits struggle with overtone crystals (above appx

25-40MHz), and for FPGAs that is on the 'low' side of useful. So above this, and you are pretty much into Osc-Modules (or the cheaper SOT23's if you can tolerate their precision )

Silicon MEMS 'crystals' have been talked about, but still seem niche devices. - and no, these will not appear inside your FPGAs :)

-jg

Reply to
Jim Granville

Of course it is understandable that you want to minimize your risk. However, mosts user would benefit from this, as everyone needs an clock from somewhere. I cannot really believe that this is rocket-sience, as almost every uC out there has this. Most likely you can buy the IP for some bucks so that you have not to reinvent the wheel yourself?

An addition or alternative to the crystal-oscillator could be a calibrated internal oscillator with reasonable precision (e.g. +/-1 %).

Maybe X, A and L can look at Actel (Fusion), they have solved this almost perfectly, at least according to the first look at the datasheet...

Thomas

formatting link

Reply to
Thomas Entner

Why not using the PLLs for this?

Thomas

Reply to
Thomas Entner

Where can I find those. I may be looking at the wrong place. I need a

2.5V one. Here is a link for digikey where the quoted price is $5.97

formatting link
?Ref=375484&Row=706244&Site=US

Sumit

Reply to
shrutisumit

formatting link
?Ref=375484&Row=706244&Site=US

Reply to
Peter Alfke

Well. I wasn't gonna buy too many. I checked Mouser also but no luck,

But thanks to everybody for the reply. I now understand the reason why FPGAs dont take crystal input.

Sumit

Peter Alfke wrote:

formatting link
?Ref=375484&Row=706244&Site=US

Reply to
shrutisumit

formatting link
?Ref=375484&Row=706244&Site=US

You could use 10 MHz (

formatting link
) or even lower frequencies and then use the DFS of a DCM to generate higher frequencies.

--
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de
Reply to
Frank Buss

hi

why not have the one fixed max frequency on chip, and have a programmable divider to get a subfrequency

if this must be locked to an external clock, the factors are the high capacitance of the crystal, necessitating, a big drive inverter/buffer (XTAL0), which works at high frequency. and enough gain on (XTAL1 pin) that positive feedback occurs.

a chain of three inverters, will provide squareish wave.

to avoid problems of offset drift in the high impedance of XTAL1 pin it is required that some kind of very small hysterysis (+ve feedback through resistance) after two of the tree inverters is mixed on chip with the XTAL1 in signal, as this flots the XTAL1 pin arround 1/2 supply.

the first inverter has to have long channels to reduce power disipation and the last has to have wide channels to drive the XTAL0 pin.

the middle one should make the three a gemetric progression of on resistance.

a differential pair would make a better comparator for the first inverter, with lower power consumption, and the ability to apply an integration of the signal in as negative feedback to reduce the hystresys needed, which in turn aids starting of the oscillator.

basic rule is keep external osc frequency low (less slew rate problems and power dissipation problems), and use a fully digital lock loop (PLL actually frequency locked loop) based on gate delays as the on chip oscillator (must use high resistance inverters for low power, which make longer delay), and use a divider counter to effect VCO.

this solution has much jitter, but in most cases external bus speeds are slower than internal ones, and so the jitter % is small.

formatting link

for an open hardware initial CPU specification document, still being written.

Cheers

jacko

Reply to
jacko

These are the prices that the OP posted. $3,27 for the 2.5V version. (No need to get the expensive frequencies if you have DCMs)

The OP said he wanted to buy only a few. Let's say 10 pieces. So maybe a different solution would save him $20. I would say the easiest solution to achieve these $20 savings would be to work a few hours at McDonalds and then spend the money on the simple to use but more expensive oscillators.

For higher quantities the OSC should not cost more than $1.

Kolja Sulimma

Reply to
Kolja Sulimma

snipped-for-privacy@gmail.com schrieb:

Hi, why don't you use something like the ICS501MLF and attach a cheap Crystal to it? A Part search at avnet.com shows a price below $1. Plus the Crystal (e.g. Digikey 631-1030-1-ND) you get a Price over all of $1.50 The only bad thing about this solution is, that it takes some board space and needs either 5.0V or a 3.3V power supply. But you get a stable & good clock signal. I don't see any good reason for a Crystal Input ;-)

Christian

Reply to
Christian Kirschenlohr

Although it may seem at first blush to be simple - buy some IP - there are details that would need to go into the datasheet, change pin assignments etc. A clock buffer is NOT anything like an I/O buffer as made today.

Beyond that, I don't know if you have ever designed onto an onboard oscillator for microcontrollers - the documentation stinks, in general (there are a number of choices in crystal and resonator parameters - you can't just say "10MHz crystal") because of too little detail. This was Xilinx' old problem (and the fact that a lot of people don't understand the meaning of the documentation even when they get it).

Because it is now expected on microcontrollers and processors, the mfrs will often specify a suitable crystal (within some range too) known to actually operate on that circuit.

For a FPGA, that may not be suitable - you may want 10MHz - I might need 20.48MHz - someone else might want to start at 100MHz - who knows. That's a wide range and unless *all* the details are available, you'll have to try a number of solutions before you get it right (if you ever do for the application).

That would take two pins for an oscillator (which you would not want to feed into the core directly anyway) rather than using them for I/O.

It's not often I defend Xilinx, but on this, the range of applications and the fact it's not their core competence are decent reasons not to have an oscillator section.

In the vast majority of cases with FPGAs, there is a clock already being generated elsewhere used to clock data in (not always, I am aware

- I have one where I need an oscillator in front of me), and the pins would be wasted.

Keep in mind that a microcontroller *always* needs a clock. A FPGA does not *always* need a dedicated clock.

Cheers

PeteS

Reply to
PeteS

There would be 2 dedicated pins needed, I suppose. For an internal calibrated RC-osciallator this is no issue anyway.

I have used plenty of crystals on plenty of uCs and had never any problems. I had problems in video-applications where the frequency must be very precise and the crystals must be pullable, and also with ceramic resonators and self-made oscillator-circuits, but crystal + uC always just worked fine for me...

Of course there will be a limited range (e.g. 6 to 30MHz), I think most people won't start to mess around with 3rd overtone crystals, etc. for other frequencies, they can use the PLLs or dividers.

But saves one pin for the clock input ;-)

In most of my designs I have the controller integrated and would like to have a stable clock for it, or I need at least a clock for the PLLs to generate memory-clocks, etc. The other clocks on board have often the problem that they are either not always running, or not fixed frequency, or do not meet the required edge-rates for the FPGA-clock-inputs.

Maybe this is not to most important missing feature, but it would be a nice step towards even higher integration.

Thomas

formatting link

Reply to
Thomas Entner

For the Spartan 3E, there is an internal oscillator (CCLK), but I don't know the precision. If configured in default mode, the datasheet says 485 ns to 1,250 ns, but I didn't found anything about long-term stability etc. If it has good precision, you could measure the frequency and write it in some config memory. Is it possible to use this clock as a clock source for cores?

And there are some applications for which it is ok to have a variation between 1 MHz and 2 MHz, e.g. if you build a meaure device, which is accessed by a protocol like I2C, where the clock is transfered from a master.

--
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de
Reply to
Frank Buss

Thank you for the smart tip.

Sumit

Reply to
shrutisumit

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.