DDR 2 Memory controller own implementattion

May 17, 2007 3 Replies

Hi to all ............



Now i am in to developing DDR2 memory contoller with STRATIX II EP2S



180 . Is there mega core which can support burst length 8 ?I found only burst lenth 4 controllers. So i have written and no problem with code. I am using DDIO bidirectional mega function for data path to send and receive data on both edges . But problem is so many set up and Hold time violations with this mega function . Has any body developed own memory controller for BURST LENTH 8 . please help me regarding this ..........


thanks and regrads sudhakar



Hi Sudhakar, Check out

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. They have cores that are allow burst of len of 8. But to get back to you problem, are you seeing setup and hold time violations in simulation?

-sanjay

The Microtronix DDR core apparently is ble to handle BLEN=8. It's also very robust when it comes to setup&hold.

Have a look at the FPGA Products page of wwww.microtronix.com

Best regards,

Ben

Hi thanks for your kind response . I sorted out that problem some how .

Thanks and Regards sudhakar

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