Hello,
A customer of ours is using one of our IPs and reports that DC (for synthesis) complains about two things :
*A* wouldn't support 'pos as in character'pos ?? (which is very handy for cahacter to slv conversion)*B* wouldn't support booleans in generic ??
I emailed the Synopsys hotline, but got the answer that only Synopsys customers can ask such questions...
A pointer to a document stating the current limitations of DC would be very appreciated :-)
Thx in advance,
Bert Cuzeau
Hi Bert,
Synopsys DC has actually two VHDL frontends (parsers). The standard one, which is enabled by default, is just crap. It only suppoprts an extremely limited number of VHDL constructs, which makes it almost unusable for modern parameterizable designs. The newer one, called PRESTO, must be explicitly enabled. You can do this by setting the 'hdlin_enable_presto_for_vhdl' to 'true' in your dc.setup script.
Hope this helps.
Thank you both for your excellent answers. The function may be a good workaround, and
I also suspect that presto wasn't enabled.
Thx again,
Bert Cuzeau
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