A simple VHDL question

Jul 03, 2004 4 Replies

Could anyone explain what is the meaning of



out0 '0');



in the following VHDL code.



if reset = '1' then out0 '0'); out1 '0'); else out0


Could anyone explain what is the meaning of

out0 '0');

in the following VHDL code.

if reset = '1' then out0 '0'); out1 '0'); else out0

Could anyone explain the meaning of

out0 '0');

in the following VHDL code

if reset = '1' then out0 '0'); out1 '0'); else out0

Yes, it puts all the signal of out0 to '0', whatever is the width of out0

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