Data Logging / FPGA Dev board

I'm having a problem with data logging. I need to grab (and analyze) about 60 bits of data at about 120 MHz. I'm running out of depth in my logic analyzer, which has 64M, or 128M if I use the PacqMem code that Tek provides. I'd really like to grab to a depth of 256M or more.

Does anybody make an FPGA board that would allow me to do this? I would need a couple of sockets for DDR SDRAM, a USB or Ethernet interface (to get the data to the PC) and a bunch of IO connectors. It would be perfect if it had four 50-pin shrouded headers with pins-out appropriate for logic analyzer test probes. I know it's a long shot.



Reply to
Pete Fraser
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We may get close with our Broaddown2 product. The only "but" is we need to do some long outstanding work on the DDR2 socket to prove it works for memory. There are some pinning issues with some DDR cores but we do have a core we designed and used before that we think will work. Just needs some manpower to tidy up and try it out.

The probe head connections can be done as simple add-on modules. We have sufficient I/O to make it work.

If you don't mind doing most of the work it is a project I would not mind supporting. Contact me offline if you wish to persue it. Any of the public emails on our website can be used to contact me.

John Adair Enterpo> I'm having a problem with data logging.

Reply to
John Adair

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