I'm having a problem with data logging. I need to grab (and analyze) about 60 bits of data at about 120 MHz. I'm running out of depth in my logic analyzer, which has 64M, or 128M if I use the PacqMem code that Tek provides. I'd really like to grab to a depth of 256M or more.
Does anybody make an FPGA board that would allow me to do this? I would need a couple of sockets for DDR SDRAM, a USB or Ethernet interface (to get the data to the PC) and a bunch of IO connectors. It would be perfect if it had four 50-pin shrouded headers with pins-out appropriate for logic analyzer test probes. I know it's a long shot.