I am trying to generate a CPLD pad file using a dummy module and ucf.
Translate process gives the following error:
ERROR:NgdBuild:605 - logical root block 'test' with type 'test' is unexpanded. Symbol 'test' is not supported in target 'xbr'.
Any idea what might be wrong??
Is your top level module written in Verilog? If this is the case and all the module contains is the port list, i.e. no "code", the tools assume that it is a black box and look for an underlying .ngc or EDIF file. Usually to get through ngdbuild ("translate") you need to have at least an assign statement in the module.
Hey, thanks Gabor.. that exactly was the problem.. Sorted it out..
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