Hello!
If I use the CoreGenerator (for example in order to configure a Dual Port Ram) do I have to copy the source code generated by the CoreGenerator in a vhd-file or is it enough to add the generated core (-> including the xco-file by saying: "New Source... IP(CoreGen & Architecture Wizard) in Xilinx ISE Foundation)? Isn't it possible just to use the xco-file, generated by the CoreGenerator? Or do I have to add a vhd- file in addition?
Tobias.
Tobias,
The VHD file is generated just for simulating the core, if you want to.
According to the Coregen user guide, the XCO file is a log of the Coregen settings used to create your core, used in case you want to regenerate the same core with some modifications. All you really need is the EDN file to feed into the place and route tools.
Not sure if I understood your question, but I hope that helps.
Regards, Vinh
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