Hello,
Is there someone who has experiences with designing a dual port RAM. I use the device Spartan-IIE (XC2S300E). But it should be simular with other devices (e.g. Virtex, Spartan 3, etc) I know there is a Synthesis Template in "Xilinx ISE Foundation". Is there someone who knows about a complete design for a dual port RAM. I know, I need to get some more experience with VHDL.
Thank you for any help.
Tobias Möglich