Hello everyone, I managed to snag one of the freebie Xilinx Spartan 3e sample pack boards, and while the board came with ISE 7.1, I discovered the ISE 8.1 Webpack came with a lot of nice extras, like coregen.
The problem is that a lot of the IP's in the coregen don't work. I checked the app note about paths with spaces in them, and reinstalled to a folder that didn't have any. (I installed ISE to C:\projects\xilinx). The project I'm working on is in C:\projects\cores. Based on that, it appears the note is no longer applicable.
Except that I still see an error message when I try to create certain cores: "ERROR:coreutil:4 - Couldn't open "C:\Projects\FPGA Stuff\Playground\Cores\tmp\_cg\xil_804_9.in" for writing."
I also checked the Java memory allocation, and set it to 512Mb, although it doesn't seem to matter. (I saw an app note about memory allocation on NT based systems - and I'm using Windows XP)
The weird part is that some things work fine, and others don't. For example, I can create a FIFO, but not a block memory. I can build a floating point unit, but not a MAC.
Has anyone else seen this?
Thanks,
-Seth