Hi,
I've read the VHDL FAQ 4.2.21 "How to Convert Between Enumeration and Integer Values". Anyway, I have questions to these function:
function slv2pec ( signal id : std_logic_vector(2 downto 0)) -- signal id : std_logic_vector(natural range )) return pattern_edge_comb_t is
begin -- Error: No feasible entries for infix operator "