Hi,
if I want to see the content of external SRAM in simulation (Modelsim) it is no problem because the memory of the VHDL SRAM model is represented by an variable field "memdata" which I can visualize in Modelsim.
But how can I see the complete content of a RAM block (created with the MegaWizard in QuartusII) in Modelsim ? The only access to the memory are the ports wraddress, rdaddress ...
Is there a way to look at the content?
Thank you for your help.
Kind regards