Camera link specification

Hi All,

I have a project to get the image data by camera and want to convert them as grayscale information. The camera has Camera Link output. It can be connected directly to universal frame grabber. I am trying to replace the frame grabber by FPGA. Does somebody know or has information how to get camera link specification ?

The document which I found mostly only dealed with the pin configuration and didn't tell how to obtain the image pixel. I plan to use DS90CR288A to convert from LVDS to parallel. After that I don't know what should I do with parallel signal.

Thanks in advance,

-ivan

Reply to
ivanlimansyah
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The standard document is available from many camera manufacturers including:

formatting link

which tells you everything you need to know.

Slurp

Reply to
Slurp

Try:

formatting link

There is a section in appendix C which shows how to hook up the bits for various configurations. Note that "Camera Link" is not a single image format standard, so it's best to get the information you need directly from the camera provider.

HTH, Gabor

snipped-for-privacy@gmail.com wrote:

Reply to
Gabor

After you use that chip, the data should be available on certain lines, if it's a "base" configuration:

camdat:process(clk) begin if( clk'event and clk='1') then -- eight bit output camdat_out(0)

Reply to
Brad Smallridge

Why do you want to use a separate chip for LVDS to paralell? Is the frequency too high? Spartan3 (or other) has LVDS integrated in IOB.

Cheers,

Guru

snipped-for-privacy@gmail.com wrote:

Reply to
Guru

Thanks a lot, I am using VHDL and Xilinx XC2V1000. However because of lack number of I/O pins (I only have 30 pins for this purpose, because before it was designed to get image directly form camera and a little bit surprised when it come to me with PCMCIA framegrabber). Right now I am thinking to use small CPLD or FPGA only for camera. Now I am understand how to get the image data, but still have question about camera control. Does somebody know the signal that needs to be sent to controll the camera ?

Again, thank you very much for all your help.

-ivan

Brad Smallridge wrote:

Reply to
ivanlimansyah

The standard method to control the camera via Camera Link uses asynchronous serial communication at 9600 baud, 8-bits, no parity,

1 stop bit. Camera manufacturers generally either publish their protocol or supply control software that can be integrated with any framegrabber using a standard Camera Link serial communication .dll file. The serial link uses LVDS levels, and is called SERTFG for "serial to framegrabber" and SERTC for "serial to camera" to avoid confusion associated with the standard TxD and RxD naming. Some camera manufacturers offer a .dll file to use a standard PC serial port, which will allow you to get the control program running with the least software effort. In this case you just need to have hardware to translate the serial (COMM port) from the PC from RS-232 to LVDS.

HTH, Gabor

Reply to
Gabor

I wouldn't recommend this with the Virtex 2 series. The Camera Link uses "Channel-Link" 7:1 serializers. The DCM does not do a very good job of multiplying the input clock by 7. Also the frequency at the individual serial inputs can be as much as 85MHz * 7 = 595 MHz, so there isn't a lot of room for jitter on the sampling clock, especially if you consider the maximum allowed skew over the cable from the camera.

just my 2 cents, Gabor

Reply to
Gabor

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