Hi
I need little help about ISE MIG tool. I have a couple baic questions and if someone can answer me I would be very greatfull. First thing I wanted to ask is: "does MIG gives me oportunity to define data bits aslo. I meant, in the UCF file that is generated at the end I can see only control signals. That is ok, yes? than in my design, I can define constraints about DATA ports as I want. Am I right about this?
I also waned to ask one more question. I can reserve pin that I don't want to be used by MIG, but how can I be sure that pins that it has chosed are same every time I generate this core. For example . I want that all NETs are from BANK 1. I put these Bank0 Bank2 adn Bank3 as reserved. But how can I be sure that all Nets are shosen on the same way every time. Can I reserve all pins beisde the ones I want to be used by MIG (reserve also some bits from bank 1). IS it OK. But still I have problems if I am not sure that the pins are reserved the same time (IF I conect ddr and fpga on the pcb I can't change it time to time).
and the last I have some strange problem that I didn't get from the begging. I reserve all banks except the bank 1. When I want to chose pins and when I chech check box indicaitng data pins in bank 1 I get this message.
"MIG doesn't suport data signals that are from multiple sides limit your selection for Data signals for only one side". This confuse me totaly. Should I check All pins that are going to be used by mig to be on one side? Am I right?
I am greatfull for any kind of help. Thanks to everybody. Zoran