Ballpark PLB frequency

VERY ballpark: 100MHz sometimes higher too, ML505 ref design is 125MHz as example

Antti

So, around about 100Mhz?

It's fair to say that there is no def> >

I don't have the datasheets with me, but if you're running the PPC, then I think you're limited to certain multiples of PPC frequency. I ran the PPC at 300MHz and the PLB at 100MHz (on V2Pro and FX60).

I found the real issue was the implementation of the PLB Bus. There was a long combinatorial path that always failed timing, especially as more logic was added to the chip. I spent about a week with PlanAhead tweaking a layout that would consistently route with no errors.

Maybe not significantly, but a faster chip would give more timing margin.

Stephen,

I have had no trouble running a 2/3 full FX12-10 PLB bus with 4 devices at 100 Mhz.

If you have a lot of random control/status type register access from the CPU, you can offload that onto the DCR bus. And try to use as large as possible burst transfers on the PLB bus.

-Jeff

One sample: V4 FX100-10, 75MHz PLB (connecting peripherals and MPMC2) and 225MHz PPC. The "theory" said 100MHz but that's what we got. There are higher speed grades that probably would have done 100MHz.

I had FX12 totally full, with only 2 point-to-point PLB busses connected to MPMC2 and PPC. For access to peripherals I used exclusively DCR (low logic resources and high responsiveness), for high bandwidth NPI port with 64 word transfers and CDMAC for LL_TEMAC. I recommend NPI for very high DMA bandwidth.

Too bad that with EDK 9.2 the bus diversity is gone. You have to to use PLB in all cases.

Cheers,

Ales

Ales, I'm still on 9.1. What bus diversity is changed in 9.2?

-Jeff

Microblaze 7.0 doesnt have OPB bus anymore. was a real shock !

Old designs still can be used. But all new systems have all new IP-Cores!

Antti

Microblaze 7.0 still has OPB. But you have to switch it on.

Jan

ups! by default BSB with 9.2 its only PLB configured so I used older version of MB for old systems

Antti

So much for the often-vaunted claims of 'design longevity' when using SoftCPU cores then ! ;) Seems to have caught the Software Version Creep disease.... ?

-jg

Good to know!!

Guru

DCR and OPB is gone.

Guru

DCR bus is gone? WTF? I have a bunch of DCR peripherals - I cannot use those in 9.2 or beyond???

-Jeff

do not worry, you can use PLB2DCR bridge I was about to make the verification of SATA Device IP core that was connected to old PPC SoC with MB 7.0 the DCR would go via bridge thats all, no problems as such

Antti

I thought the whole point of the DCR was to allow control/status accesses from the PPC to go on in parallel with PLB operations. If you have to go through a PLB bridge, then the advantage of the DCR is lost.

-Jeff

yes, and for me I was about to convert a PPC design to microblaze for Virtex-5LXT and the IP-Core used DCR so i had to use the bridge for DCR

Antti