Hi, can someone tell me where I can access (read/write) the horizontal long lines in the Virtex-II architecture. In the FPGA editor the long lines are connected to blocks on either ends of the FPGA and they are connected to the switch boxes of the CLBs. However, when implementing small designs the routing tools seem to drive the long lines only from the ends. Can they be driven and read from each CLB, too? Regards Heiko