It depends where your add/swallow is done. Another way to figure the range, is that every phase compare, can generate one add/swallow. If you do it at 2KHz, then the 1.25Hz is 50Hz/40. If you do it at 2KHz x 7500, then yes, lock range is less.
Note also that with a low 50Hz Fout, there will be a finite phase-skew rate in these add/swallow schemes, that will give long lock times. eg 50Hz to 0.5Hz is a "1 pulse in 100" area, which gives > 2 second lock times. [the simplest phase detectors can give 'go the wrong way' output, so the actual lock time will be longer - a frequency detector will lock faster] Might be a problem in many systems ?
You should define your jitter ceilings, and work from that as all pure-digital methods have some jitter, or step size.
-jg