Hello!
I have card which generate 16-bit ISA bus timing. I like to know if ISA bus in 16 bit generates address bus sequentially 0x0000, 0x0001,
0x0002... or it generates only even/odd addresses.
Thank you and best Regards, Amir
Hello!
I have card which generate 16-bit ISA bus timing. I like to know if ISA bus in 16 bit generates address bus sequentially 0x0000, 0x0001,
Thank you and best Regards, Amir
Addresses are byte addresses so for a single 16 bit transaction you need to use a even (A0=0) address.
unaligned I/O access should be possible (16 bit transfer from odd addresses) but why do 2 8 bit transfers...
Peter Wallace
It's been long long time since my last ISA design. From what I rememebr, 16 bit transfers on ISA bus are always word aligned: i.e. A0 is always 0. This goes for both memory and I/O. If you can find IBM's "AT technical reference", you can see the original schematics of the ISA bus interface. As I remember, the logic there made it impossible to have a 16 bits I/O on the odd addresses... (I'm telling you all these things off my head. As I said before, it's been a long long time since my last ISA design).
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