32 bit access on a 16 bit bus with Xscale

I have a coworker working on a driver to read/write 32-bit data from/to a 16-bit data bus device with ARM-PXA255. He=B4s managed to have it working by reading and writing two 16-bit words (readw/writew). He=B4s configured the memory control register (MSCx) for 16-bit data bus (CS5). Although it works, we'd like to know if it is possible to use 32-bit instructions (readl/writel) and let the pxa manage the 32 bit words concatenation/splitting just like x86s (386SX for instance) do in similar situations. We=B4re using non-burst accesses. Any ideas/suggestions are very welcome.



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