I have an MPC83xx based system. We have PCI device connected. I am currently working on the bootloader to setup and test the PCI subsystem onboard.
Following things are done.
- Enabled PCI
- configured and identified all the PCI devices onboard.
- Identified the Memory space needed for each of the device.
- Following setting are done
- system registers are located @ 0xE0000000
- hence configured PIMMR reg to 0xE0000000
- enabled PCI clock in OCCR reg
- set the PCILAWBAR0 to 0x80000000 (memory space)
- set the PCILAWBAR1 to 0xA0000000 (prefetch memory)
- set Outbound translation registers as follows: Outbound BAR0 - 0x00080000 (Memory) Outbound BAR1 - 0x000A0000 (Prefetch) Outbound BAR0 - 0x000A8000 (I/O)
- set Inbound translation registers as follows: Inbound BAR0 - 0 Inbound BAR1 - disabled Inbound BAR2 - disabled
- after this, reset the PCI thru GCR register
- enabled the Memory / IO in command register of the MPC83xx PCI controller
- identified the various PCI devices in the system and configured the memory bars (Memory Mapped BARS) from address 0x80000000
Problem I am facing:
- After this particular setting, I expected accessing memory from
some of the pointers that might help me are:
- Do I need to configure the DBAT registers ?
- For the processor to understand that 0x80000000 + memory is PCI memory, is the above configuration sufficient ?
- Also, if somebody can throw somelight on how the memory maps are exactly defined for MPC83xx ( is it just the IBAT and DBAT or something else as well) ???