Dear everybody,
we have experienced a problem with our boards. We are using an Altera Cyclone device with NIOS II processor interfaced with a static RAM and a FLASH memory. The R/W access time for RAM has been set up to 60ns (the RAM datasheet reports
55ns) and the R/W access time for FLASH has been set up to 80ns (the FLASH datasheet reports 70ns). Up to 45=B0C the system works well. Over this temperature the processor crashes. Enlarging the R/W access times the system works well up to 85=B0C.
Can you explain me how the signal timing change in function of temperature ? Is it possible to make something like a compensation to prevent this issue ? Can you give me a link where get information about this issue ?
Best Regards
/Alessandro