Minimum Pin Count For CompactFlash access

This is closely tied to my other thread about using Compact Flash in True IDE mode. The main goal is minimum pincount. The True IDE mode was chosen for minimum pins (3 address, 8 data, -CS

-IORD, -IORW, INTRQ, and -IORDY). Off the top of my head.

In reading the spec, I get the impression that you can also use either PC Memory or PC I/O mode with less than the full complement (11) of address lines.

AFAICT, you can get both the odd bytes and the even bytes out of the data register, and not need to increment the address lines, because consecutive byte reads out of the data register will return consecutive data bytes.

So, while there is a direct addressing mechanism, the descriptions of the registers seem to indicate you can get data just by the data register (at address 0) (possibly with toggling the A0 on alternate odd/even bytes).

I will probably wire this up next week if my boss says we need to try it out. I figure I can save myself some messing around if someone knows it won't work.

I'm guessing:

-WE, -OE, -CE1, -CE2, D7-0, A2-0, READY, AND -WAIT

should suffice. 17 pins? Perhaps one or both of the CE pins could be tied to power or ground also. (We are pin misers)

The crux of the question, is can I get device identification and read and write block data with just D7-D0, and A3-A0?

Rufus

Reply to
Rufus V. Smith
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This guy did the interface with 15 lines, not counting pins strapped to ground and vcc. I'm not sure he can support writes without the wait line though.

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Reply to
Jim Stewart

That's great! Thanks Jim! You have given me hope! That will be a pin count we can live with and I don't think it will require major firmware changes.

Rufus

Reply to
Rufus V. Smith

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