How to embed Time and Date in Xilinx FPGA?

I would like to automatically embed the Xilinx compile (synthesize) time into my FPGA. I have a script file that can put the time and date into my Verilog code.

I would like to automatically call that script file from the Xilinx ISE everytime i run the synthesizer. Is there anyway for the ISE to call an outside routine (other than running the whole thing from a command line without the ISE) ?

Is there an easier way to embed date and time in the FPGA?. I want to make it as easy as possible otherwise no one will do it. That is why I would like to have it hook right into the ISE.

Suggestions apreciated,

Bob