Hi Everyone,
I have configured fx2 in slave fifo mode with following end poin configuration : In Bulk Double ---> EP2 Its full flag ---> FlagA pin Out Bulk Double ---> EP4 Its empty flag ---> FlagB pin In Bulk Double ---> EP6 Its full flag ---> FlagC pin Out Bulk Double ---> EP8 Its empty flag ---> FlagD pin
In external logic (i.e fifo controller) I wait for EP8 empty flag signa on FlagD pin. But it gets asserted for only first time when there is som data. After that it does not gets asserted.
Anyone knowing about this issue kindly reply me....
Thanks Sajjan